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Question This year GPU accelerator table, thanks

What is the value of MI455X?

  • 10/20*20/40

  • 20/20*40/40

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1250

1250

Member
1773393611530.png R200=Rubin 1250=MI455X
In the case of Rubin, it appears that adaptive compression(semianalysis 3:2) has replaced 2:4 structured sparsity.
I am uncertain whether the value is 25 or 35. On the other hand, I've put together a table where the MI455X is listed with the same value.
1773394047356.png (https://chipsandcheese.com/p/amds-cdna-4-architecture-announcement)
SemiAnalysis stated that FP4 is 32,768, but it seems highly likely that this is a dense value. The matrix value seems to be based on sparsity?

So, to conclude, how accurate would you say top table above is? (25 or 35 etc)
 
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2.5×1.4×1.25=R200
Increasing SM count from 160 to 224
×1.4
Doubling Tensor Core width in the SM to 32768 FP4 MACs/clock
×4?
Increasing clock speed 25% from 1.90GHz to 2.38GHz
×1.25
 
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