Question AMD Phoenix/Zen 4 APU Speculation and Discussion

[uzzi38]

I can finally make this thread.

https://twitter.com/x/status/1519669375283957760

Phoenix is indeed RDNA3. My advice to everyone: treat the old APU rumours as being out of date.

 

[LightningZ71]

To my knowledge, Dali hasn't gone out of production yet. AMD will likely be producing them for a while longer for at least secondary markets which will likely see them get renamed to tge new standard as well. Mendocino will be more expensive per unit than Dali for a long time, so there will be market space for it.

 

[moinmoin]

To my knowledge, Dali hasn't gone out of production yet. AMD will likely be producing them for a while longer for at least secondary markets which will likely see them get renamed to tge new standard as well. Mendocino will be more expensive per unit than Dali for a long time, so there will be market space for it.

Picasso should be still in production for some time as well. After all it's part of Tesla's entertainment system only since last year, which I don't think will change quickly.

 

[Kaluan]

I don't see either of those get rebranded/refreshed as 2023/7000 models tho. But we'll see. So far I think we'll only see new SKUs (we can all agree Mendocino is that) and refreshed ones and probably just for specific lower end markets.

Don't think there ever will be both 7830U/7835U (Rembrandt refresh) and 7840U (Phoenix Point), they will probably also tier older gen one step down. The Barcelo/Rembrandt Zen3/Zen3+ thing is doing my head in tho.

Mostly I'll just wait for CES 2023/other potential big announcements and see the lineups to pass final judgment, next year it's likely I'll be looking for a new laptop anyway, so I'll have a POV of being directly affected as well.

Kinda sad desktop Phoenix is only in Q3, else I would just go for that a skip the new CPU/GPU turbulence for awhile. 😅

Bit surprised everyone stopped talking about the RDNA3-side of Phoenix here tho. Last I heard it may be based on N33's ("6nm") RDNA3 implementation (more frugal than N32/31), but on "4nm"? Or is it chiplet and "6nm"?

 

[moinmoin]

The Barcelo/Rembrandt Zen3/Zen3+ thing is doing my head in tho.

I was previously suggested that Zen 3 and Zen 3+ will be designated 7030 and 7035 respectively. I do hope that to be the case, with no randomness to it.

Bit surprised everyone stopped talking about the RDNA3-side of Phoenix here tho. Last I heard it may be based on N33's ("6nm") RDNA3 implementation (more frugal than N32/31), but on "4nm"? Or is it chiplet and "6nm"?

Phoenix Point does use "AMD chiplet technology" so a N6 chiplet is certainly a possibility. Though there is still no clear info to what extend it's chiplet based, a separate RDNA3 chiplet would point to a structure akin to Intel's Meteor Lake which would be quite the surprise.

 

[Rekluse]

Curious whether the XDNA AIE could assist with BVH traversal for RT. Or what it's client side functions could possibly be.

I'm wracking my brain trying to figure out how an "AI Engine" could save power in a laptop.

 

[LightningZ71]

Perhaps non-optimized computing cores performing AI calculations are less efficient than dedicated, custom circuits?

 

[Glo.]

Chiplet for Phoenix Point means: monolithic part of CPU + iGPU, and a AIE/FPGA chiplet on the package.

There is a possibility for Infinity Cache chiplet. But very, very, very slim.

 

[naad]

If Phoenix is using CoWoS or whatever fancy name it goes under now like N31 is using then I see little point in not moving the GPU to its own die, active power should be minimal but the benefits of moving the GPU chiplet to a different node with denser libraries that the CPU portion can't use should be enormous.

 

[jpiniero]

If Phoenix is using CoWoS or whatever fancy name it goes under now like N31 is using then I see little point in not moving the GPU to its own die, active power should be minimal but the benefits of moving the GPU chiplet to a different node with denser libraries that the CPU portion can't use should be enormous.

Guessing the IGP, if it is chiplet, would be on N6 instead of N5/N4 like the main Phoenix die is.

 

[DisEnchantment]

Holy Mackerel, density in N31 GCD based on N5 is around 132 MTr/mm2, just about the same as an older gen iPhone SoC, even higher than AD102 on N4. 😱

If this is what AMD is going for in Phoenix, they can fit 18 Billion transistors in less than 140 mm2. ( 6000 series@13.1 Billion XTor and 5000 series@10.7 Billion XTor)
Even a more conservative 120 MTr/mm2 would make an 18 Billion transistor chip come in at 150 mm2.
Not even considering if they might gain additional density from N4 migration too.

Bean counters must be twiddling their thumbs now waiting for the numbers to come in.

 

[BorisTheBlade82]

View attachment 70476

Holy Mackerel, density in N31 GCD based on N5 is around 132 MTr/mm2, just about the same as an older gen iPhone SoC, even higher than AD102 on N4. 😱

If this is what AMD is going for in Phoenix, they can fit 18 Billion transistors in less than 140 mm2. ( 6000 series@13.1 Billion XTor and 5000 series@10.7 Billion XTor)
Even a more conservative 120 MTr/mm2 would make an 18 Billion transistor chip come in at 150 mm2.
Not even considering if they might gain additional density from N4 migration too.

Bean counters must be twiddling their thumbs now waiting for the numbers to come in.

Yes, amazing figures. But lest we not forget that the GCD has next to none IO (EFB IO is pretty dense) and almost no SRAM. Both heavily favours density and will not be applicable for a monolithic APU.

 

[lightmanek]

View attachment 70476

Holy Mackerel, density in N31 GCD based on N5 is around 132 MTr/mm2, just about the same as an older gen iPhone SoC, even higher than AD102 on N4. 😱

If this is what AMD is going for in Phoenix, they can fit 18 Billion transistors in less than 140 mm2. ( 6000 series@13.1 Billion XTor and 5000 series@10.7 Billion XTor)
Even a more conservative 120 MTr/mm2 would make an 18 Billion transistor chip come in at 150 mm2.
Not even considering if they might gain additional density from N4 migration too.

Bean counters must be twiddling their thumbs now waiting for the numbers to come in.

It seems that AMD decided to optimise for density on N5 for GPU's, hence we have very similar final clocks for the 7900XT(X) compared to 6950XT. I expect that GPU to clock very hight with sophisticated cooling, but it will be limited on standard air cooling due to heat density.
I think this is a good trade-off considering optimal VF curve and how parallel graphics workloads are.
I'm looking forward to December 13th to find out more 🙂

 

[Tigerick]

After RX7000 event, I have better understanding of upcoming Phoenix Point APU:

• RDNA3 change the design of CU with SP supporting dual issue instructions. So rumors of 1536 SP is actually 768 SP with dual issues. Go check Anandtech to know details. We should expect 20-30% performance improvement of 6800H. FPS might improve further if AMD updates the scheduler. The performance might be similar to half of Navi 33 7600M with 1536(?) SP.
• If you are into gamings, PP notebooks might not be good choice anymore. AMD targets PP notebook as elite ultra notebook with TDP of 28W. I am not sure there is going to have 45W version...
• Dragon Range CPU essentially notebook version of Ryzen 7000 which would pair with Navi 32 and 33 GPU. If 6 core Ryzen CPU + 7600M GPU would be selling for USD1000 then AMD has winning hand.

 

[LightningZ71]

From previous posts that looked into the released low level driver support in Linux, Phoenix Point appears to be in some sort of half way point between rembrandt and RDNA3. It looks like it may just have some of the data flow and organization improvements with increased internal caches, but is designed around having highly restricted memory throughput.

My personal opinion is that AMD has accepted that the memory bandwidth restrictions makes some of the RDNA 3 improvements useless and decided to not waste circuits on them, instead focusing on improving the performance of things like FSR and XeSS as that will be very important in that class. If they can pull off getting decent 1080p performance at medium detail, FSR can get playable 1440p resolutions that look good.

 

[Glo.]

View attachment 70476

Holy Mackerel, density in N31 GCD based on N5 is around 132 MTr/mm2, just about the same as an older gen iPhone SoC, even higher than AD102 on N4. 😱

If this is what AMD is going for in Phoenix, they can fit 18 Billion transistors in less than 140 mm2. ( 6000 series@13.1 Billion XTor and 5000 series@10.7 Billion XTor)
Even a more conservative 120 MTr/mm2 would make an 18 Billion transistor chip come in at 150 mm2.
Not even considering if they might gain additional density from N4 migration too.

Bean counters must be twiddling their thumbs now waiting for the numbers to come in.

PHX is on N4P(?) process, while N31 is on N5, so PHX could still get higher density.

But if the numbers you provided are correct, PHX could have over 20 bln xTors.

 

[jpiniero]

PHX is on N4P(?) process, while N31 is on N5, so PHX could still get higher density.

But if the numbers you provided are correct, PHX could have over 20 bln xTors.

Isn't the IGP likely to be on N6 though?

 

[Glo.]

After RX7000 event, I have better understanding of upcoming Phoenix Point APU:

• RDNA3 change the design of CU with SP supporting dual issue instructions. So rumors of 1536 SP is actually 768 SP with dual issues. Go check Anandtech to know details. We will expect 20% performance improvement of 6800H. FPS might improve further if AMD updates the scheduler but don't expect miracle. The performance might be similar to half of Navi 33 7600M with 1536(?) SP.
• If you are into gamings, PP notebooks might not be good choice anymore. AMD targets PP notebook as elite ultra notebook with TDP of 28W. I am not sure there is going to have 45W version...
• Dragon Range CPU essentially notebook version of Ryzen 7000 which would pair with Navi 32 and 33 GPU. If 6 core Ryzen CPU + 7600M GPU would be selling for USD1000 then AMD has winning hand

Nope. As @DisEnchantment provided data for it before, Phoenix is similar to N33, which means opportunistic dual Issue.

Isn't the IGP likely to be on N6 though?

Nope. PHX is monolithic design for CPU and iGPU.

 

[Glo.]

We know that Phoenix is monolithic for CPU and GPU side.

But there were articles written that Phoenix and Strix point are actually chiplet based.

So here is my question, people.

What if CPU+GPU portion is indeed monolithic, but memory controller, and caches are on the chiplets, just like N31 is?

 

[LightningZ71]

I have a feeling that, for a fair chunk of time going forward, that it's going to make more sense for the iGPU to be on a density optimized die, the cpu to be on a performance optimized die, and the I/O on an efficiency optimized trailing node.

 

[Glo.]

I have a feeling that, for a fair chunk of time going forward, that it's going to make more sense for the iGPU to be on a density optimized die, the cpu to be on a performance optimized die, and the I/O on an efficiency optimized trailing node.

Looking at how AMD designs their GPUs(high clocked) I don't think that is required.

 

[LightningZ71]

They do try for frequency, but, you're mainly looking at desktop. Density optimized processes have plenty enough frequency available for the likes of 6400/6500xt.

 

[Kaluan]

A Dragon Range 12 core SKU (7845HX) just leaked in that AOTS meme database. But I'm not even sure which is the proper thread for it or if there is one lol

 

[moinmoin]

A Dragon Range 12 core SKU (7845HX) just leaked in that AOTS meme database. But I'm not even sure which is the proper thread for it or if there is one lol

Since we are guessing Dragon Range is just Raphael used in mobile form factors the regular Zen 4 thread should fit, and there it was mentioned by @deasd before:

Page 435 - Discussion - Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

Page 435 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

socialtechwork.com

 

[Kaluan]

Since we are guessing Dragon Range is just Raphael used in mobile form factors the regular Zen 4 thread should fit, and there it was mentioned by @deasd before:

Page 435 - Discussion - Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

Page 435 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

socialtechwork.com

Yeah that's were I saw it first, before the videlcardz article on it... But no one reacted to it

Thought for a sec they commented in the wrong thread lol

I wonder what we'll see in new laptop designs on the market, Dragon or Phoenix. I reckon they're both announced at CES.

 

[moinmoin]

I wonder what we'll see in new laptop designs on the market, Dragon or Phoenix. I reckon they're both announced at CES.

Personally I hope all designs using dGPUs will build on Dragon, with Phoenix mostly left to its iGPU. I also expect both to be announced at CES, though I'd be surprised Phoenix to see any relevant availability in the market before Dragon.