adroc_thurston
Diamond Member
Yep, shader cores have been doing pretty dang generic IEEE FP math since times immemorial. That hasn't changed.Is it even a shader core anymore when the µArch doesn't have any fixed function gfx silicon?
Yep, shader cores have been doing pretty dang generic IEEE FP math since times immemorial. That hasn't changed.Is it even a shader core anymore when the µArch doesn't have any fixed function gfx silicon?
No, I mean how is it a shader when it isn't shading anything anymore?Yep, shader cores have been doing pretty dang generic IEEE FP math since times immemorial. That hasn't changed.
Shading in the current day and era means doing generic IEEE SPFP math, so yeah.No, I mean how is it a shader when it isn't shading anything anymore?
I can see that you lack experience outside of the IT industry specifically so I will rain on your parade.Shading in the current day and era means doing generic IEEE SPFP math, so yeah.
Well no, because shading became a pile of IEEE SPFP math a while ago.Shading has always been a gfx term that applies generally across all graphics work, either drawn by hand or rasterised by computer.
That's why they called them shader cores or shaders in the first place.
Regardless of HW we will see the most RT perf gains overall in SW from PS5 to PS6 generation based on what I have been seeing from various academic sources over the last few years.Looking at RDNA3 32CU vs RDNA4 32CU in RT massive perf gain.
I'm assume RDNA5 will get, also big improvement especially, if they add Traversal Engine(currently in patent)
I need a dad joke 'like'....
Is HIP even a good framework?hope AMD/Blender hurry up and tune Cycles + HIP RT for RDNA4, because the results thus far in Blender 4.4 do not show even close to the same gains seen in RT gaming.
It's too early too tell.Is HIP even a good framework?
CDNA 4 for you 😛Someone pls give us a leek
It's CUDA.Is HIP even a good framework?
Report by Ryan ATthere it is.
yeah, it's 12 stacks of HBM4.
CDNA4 also brings native support for FP6 and FP4 data types to AMD’s accelerators for the first time. One of the marquee features of rival NVIDIA’s Blackwell architecture, FP6 and FP4 have become a new target for AI inference, as developers look to wring every TOP/FLOP of performance from these expensive and power-hungry GPUs. And, aiming to one-up NVIDIA at their own game here, AMD has even beefed up FP6 performance on their architecture so that it processes at twice the rate of FP8, unlike NVIDIA’s architecture where it processes at the same rate as FP8. AMD in essence built a better FP4 unit to support FP6, rather than reusing an FP8 unit to support FP6. This carries a die area penalty, but the upshot is double the performance.
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AMD's AI Future is Rack Scale 'Helios'
Key Announcements from AMD Advancing AI 2025morethanmoore.substack.com
AMD copies no one and everyone copies them.So much for losers claiming that AMD only copies Nvidia tech. Double the FP6 performance of Blackwell!
AMD copies Nvidia twice, so they get double the performance. AMD fools, they could have copied thrice.So much for losers claiming that AMD only copies Nvidia tech. Double the FP6 performance of Blackwell!
Every time I post the performance doubles.....AMD copies Nvidia twice, so they get double the performance. AMD fools, they could have copied thrice.
Epyc Verano?
seems typo from AMD. it's VeronaVerano