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Discussion ARM Cortex/Neoverse IP + SoCs (no custom cores) Discussion

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So, since apparently the No Custom Cores thread is also the Olympus thread, I want to clarify a couple things about Vera. These are all fairly old but post-tapeout bits.

  • MaxQ is 350W, MaxP is 450W; the speculation on this forum that it'll be 50W or something is ridiculous.
  • Target perf/socket is 2x Grace, higher for memory-bandwidth-bound loads. Nvidia has claimed 2.5x+ on openradioss.
  • At one point a DDR5 memory controller die option was envisioned that would provide 2TB capacity, instead of LPDDR5X's 1.5TB, at 960GB/s. I have no idea if this is still coming, but I assume not. Slightly higher capacity for slightly worse bandwidth is a bit of a niche target.
  • A while back, Nvidia was claiming 40% IPC; now they're claiming 50%. I don't know why the change but my suspicion is that it comes down to choice of benchmark.
Edited to add: And the claims that it's some kind of "purpose-built agentic CPU" are, of course, nonsense. It's built for the same use targets as Grace, only moreso.
 
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The one who will really be hurt by this is Qualcomm. They were rumored to be introducing server CPUs in the next year or two, now they have to compete with a supplier/partner. It would be like how Intel would feel if ASML announced it was breaking ground on the first in a series of fabs.
 
adroc_thurston said:
No, the system design is a Rome bootleg.
The perf target is above Turin Classic.
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Yeah ok gotcha. Thanks. And it will be up against Venice, which is obvs higher performance than turin classic. With all the downsides of non x86 compat and none of the upsides of being in house silicon with lower cost. That about right?
 
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