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Intel Cannonlake Leaked - It's 3D

Looks like that could be a hard left hook that connects solidly with AMD's jaw....

If it's accurate... 😉
 
Just cuz it's patented doesn't mean it will be utilized. It's called a protective moat* of IP. We can only wait and hope; does look cool.
 
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Wow that is way cool!! how the heck would you cool the uncore die part though? Reminds me of the 3d layered cpu of the Raspberry Pi 3 but on a larger x86 scale.
 
My buddy who's into hardware told me about this the other day, but I didn't know how to explain it.. Nice catch & good info 🙂
 
Does this necessarily mean that their are single core gains? Or just that it is easier to pack in more cores?
 
Off-hand, I'm not seeing anything here that AMD couldn't also do with interposers and "Infinity Fabric". AMD has experience from the GPU side to draw on here, which should help.

And the fact remains that AMD can create GPUs that are at least reasonably competitive, while Intel cannot - and, in fact, if rumors are accurate, had to strike a deal to buy GPUs from AMD.
 
JDG1980 said:
Off-hand, I'm not seeing anything here that AMD couldn't also do with interposers and "Infinity Fabric". AMD has experience from the GPU side to draw on here, which should help.

And the fact remains that AMD can create GPUs that are at least reasonably competitive, while Intel cannot - and, in fact, if rumors are accurate, had to strike a deal to buy GPUs from AMD.
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The problem with interposers is that you are limited to the size of the interposer for all of your silicon needs 😛
 
Fig. 17 shows a FIVR, I thought Intel was not going bring that back until Icelake. Also SST ram, is that ready for prime time?
 
imported_bman said:
Fig. 17 shows a FIVR, I thought Intel was not going bring that back until Icelake. Also SST ram, is that ready for prime time?
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Icelake won't use a FIVR per se, it's something called an McIVR, or multi-chip integrated voltage regulator. I don't know how it works, but that's what Ice is using.
 
Intel just said their upcoming processors are going to be about 15% faster, considering this is coming from Intel themselves that probably means only 10% faster and the speed coming from higher clocks.
 
SlickR12345 said:
Intel just said their upcoming processors are going to be about 15% faster, considering this is coming from Intel themselves that probably means only 10% faster and the speed coming from higher clocks.
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It seems likely that the 15% refers to the Coffee Lake mobile chips, though.

SL-X and KL-X should have a little better bumps than we saw going from Broadwell/Haswell to Skylake/Kabylake, I think.
 
SlickR12345 said:
Intel just said their upcoming processors are going to be about 15% faster, considering this is coming from Intel themselves that probably means only 10% faster and the speed coming from higher clocks.
Click to expand...
Under Sysmark, most if not all of the gains come from better thermals & higher clocks, I doubt we'll see better IPC till 10nm.
 
I think we shouldn't place too much emphasis on patents. Most aren't used in actual products anyway. The diagrams also seem to point out the possible configuration, not what will happen.

R0H1T said:
Under Sysmark, most if not all of the gains come from better thermals & higher clocks, I doubt we'll see better IPC till 10nm.
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10% is what we get from a "Tock" anyway.
 
SlickR12345 said:
Intel just said their upcoming processors are going to be about 15% faster, considering this is coming from Intel themselves that probably means only 10% faster and the speed coming from higher clocks.
Click to expand...
Cool, when do pre-orders start?! 😉

I can see some things moving to 3D to make things more dense, so, in theory, you can have a ton more cache in the same planar footprint, other things, not so much, wouldn't really help.
Too bad it is too easy to get patents these days, there are some really cools stuff that was never made, so wait for final silicon.
 
AMD have been talking active interposes for ages, how does one expect things like Navi or the datacentre APU's to scale long term? I expect NV will do something similar as well in highend GPU.

Everyone knows performance scaling on large dies is becoming more and more challenging everyone is looking at similar concepts. What we will all have to wait and see is what execution looks like.
 
Doesn't look insurmountable to AMD at all. Their IP is already designed to be built like legos starting with Zen and Vega.
We don't know if standard interposers is what they're using, we haven't heard anything about what kind of packaging technology they're working on.

For all we know, Navi's "scalability" could in fact be something similar to what is in the patent here.
 
Absolute0 said:
Just cuz it's patented doesn't mean it will be utilized. It's called a protective moat* of IP. We can only wait and hope; does look cool.
Click to expand...

I agree with a comment: if Intel did not think that Cannonlake would come to market, they would not have announced it. They put up the protective moat patent in 2014. Only after they realized that it was commercially viable did they announce it.

Historically, the patents follow the products. If stacked chips weren't coming from Intel, then they'd have announced some other product instead of Cannonlake. This is how the culture works at Intel. They don't let one code name take the form of anything. Code names are very specific at Intel.
 
Except that patent was from 2 years ago for technologies that will come eventually. It's possible it's still the Cannonlake project but scaled back to be a standard 2D chip and the stacking products will come later. Coffee Lake's 4+2 die size is pretty decently rumored to be not much different than Kabylake 4+2 so you can assume it's not changed as radically as that patent suggests.
 
What's the homerun that Intel is claiming? Nothing at all close to the 15% performance increase in Sysmark that they claimed that I can see?? Don't care about outright marketing terms.
 
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