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Question Speculation: RDNA3 + CDNA2 Architectures Thread

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GodisanAtheist said:
- Hmmm, we all assume RDNA3 is going to be the first arch on 5nm, but its possible we just get RDNA2 on steroids first, then the "tock" happens later and we get the new arch on the same 5nm node. Maybe keep the lower, less margin oriented end of the series on the old node.

That's one way to really squeeze the most out of your R&D dollar.
Click to expand...
I think most of us expect RDNA on TSMC N6. That way AMD has one wafer allocation on the N6 (off N7 lines) and another wafer allocation on N5P (which we know will be Zen4 chiplets). It's the only way to expand inventory given the current demand for TSMC wafer production.
 
GodisanAtheist said:
- Hmmm, we all assume RDNA3 is going to be the first arch on 5nm, but its possible we just get RDNA2 on steroids first, then the "tock" happens later and we get the new arch on the same 5nm node. Maybe keep the lower, less margin oriented end of the series on the old node.

That's one way to really squeeze the most out of your R&D dollar.
Click to expand...

Is there any good reason to take that approach though? They'd have to port RDNA2 designs to 5nm which take time away from other work, they'd have to spend money on the masks for the 5nm RDNA2 chips which isn't exactly cheap, and they'd have to use wafers for those 5nm RDNA2 chips which could be going to other products.

Right now they're selling every single GPU they can make regardless of anything else. Hell, if they cranked out some new Polaris cards on the old GF 12/14 nm node right now those would probably sell out too. If they can get CPU chiplets out on 5nm that would free up 7nm wafers AMD is using for CPUs to make more GPUs or other products.

They're better off just keeping their graphics on 7nm until the next design is finished and ready for 5nm. If the graphics team is working more closely with the CPU team then they can use the lessons learned by that team when it comes to designing for the 5nm process. No need for a pipecleaner product when they effectively get one for free because the CPU team already has experience working with the new node.
 
Ajay said:
I think most of us expect RDNA on TSMC N6. That way AMD has one wafer allocation on the N6 (off N7 lines) and another wafer allocation on N5P (which we know will be Zen4 chiplets). It's the only way to expand inventory given the current demand for TSMC wafer production.
Click to expand...

I'm pretty sure N6 and N7 share the same production equipment.
 
Hitman928 said:
I'm pretty sure N6 and N7 share the same production equipment.
Click to expand...

Thanks. I wasn't aware of that. If that's the case does it make much sense to stay on N7 if you can get better density out of N6? Obviously there's upfront cost to make the change, but over sufficient time it would pay for itself just because of the additional volume.
 
GodisanAtheist said:
- Hmmm, we all assume RDNA3 is going to be the first arch on 5nm, but its possible we just get RDNA2 on steroids first, then the "tock" happens later and we get the new arch on the same 5nm node. Maybe keep the lower, less margin oriented end of the series on the old node.

That's one way to really squeeze the most out of your R&D dollar.
Click to expand...

AMD has suggested in the past that they will never rely solely on node changes for performance increases.
 
Ajay said:
I think most of us expect RDNA on TSMC N6. That way AMD has one wafer allocation on the N6 (off N7 lines) and another wafer allocation on N5P (which we know will be Zen4 chiplets). It's the only way to expand inventory given the current demand for TSMC wafer production.
Click to expand...

Consoles are going to N6. Zen 4 and RDNA3 are almost certainly both 5nm. Whether N5 or N5P is anyone’s guess.
 
Mopetar said:
Thanks. I wasn't aware of that. If that's the case does it make much sense to stay on N7 if you can get better density out of N6? Obviously there's upfront cost to make the change, but over sufficient time it would pay for itself just because of the additional volume.
Click to expand...

N6 does use EUV which should reduce the mask layers needed which in theory should also reduce wafer cost by allowing each wafer to be completed faster, but then I don't know how that balances out with TSMC trying to amortize the cost of their EUV machine purchases or if the EUV machines then become the bottleneck slowing the whole production down. If the EUV machines aren't a bottleneck, moving to N6 does make some sense as they should be able to increase their wafer throughput and have more dice per wafer. Maybe under normal circumstances it wouldn't be worth the cost to port so quickly, but with the insane demand, spending the cost to port to get every bit of volume possible does make sense. Especially because the console makers really make money from service/licensing fess and having the largest customer base possible buying games and accessories for the console is the ultimate goal.
 
eek2121 said:
Consoles are going to N6. Zen 4 and RDNA3 are almost certainly both 5nm. Whether N5 or N5P is anyone’s guess.
Click to expand...

I tend to see it the same way. AMD managed a great perf/watt increase going from RDNA to RDNA 2 but that came at the cost of die size. I am not so sure AMD could do the same again without a node change.

The idea of an 80CU GPU chiplet with just Infinity Fabric IO also makes some sense since I expect that it would be in the ballpark of 250mm^2 on 5nm. Then AMD can make an IO die with the memory controllers and the Infinity Cache which they could put on 6/7nm.

I do see there being a monolithic 80CU GPU as well but that could be for laptops and the desktop gets a single chiplet version.
 
Leeea said:
The rx6900xt is already 80cu.
Click to expand...

And it is on 7nm and power hungry (for laptops). A 5nm part at conservative clocks would probably be okay for laptops though.

Otoh 80CUs + IO die may not be.

It looks like it could be a similar strategy to what they do with the desktop CPUs/ APUs.
 
Timorous said:
I tend to see it the same way. AMD managed a great perf/watt increase going from RDNA to RDNA 2 but that came at the cost of die size. I am not so sure AMD could do the same again without a node change.
Click to expand...

No, look at the PS5... is uses less power than a 5700xt while having higher clocks and a 8 cores cpu... without infinity cache
 
I can see the Radeon 7xxx series be RDNA3 N31, N32, and N33 occupying the high-end (7900XT, 7800XT, 7700XT) using TSMC N5/N5P with the more mainstream products being RDNA2 but on TSMC N6. I can see a scenario where AMD will eventually shift all production lines to either N5 or N6, depending on the needs of the product. Performance oriented products on N5, price oriented products on N6.
 
looks like the floodgates cracked a little.

the 2x performance may be specifically part of fidelitySuperResolution, so possibly not huge cu gains due to chiplets. coreteks broke first and redgamingtech went to his sources to see if it checked out.

summary
rgt slide.jpg


so native resolution could be dead as a metric as everyone will be forced to render 1080/1440 and upsample to 4k and use fsr/dlss to get the gains associated with "next gen" performance when it comes to framerates.
 
I am thinking if RDNA 3 was a 5 nm architecture AMD would have said so. That they didn't tells me that it is probably 6 nm.
 
scineram said:
I am thinking if RDNA 3 was a 5 nm architecture AMD would have said so. That they didn't tells me that it is probably 6 nm.
Click to expand...
Yeah. Last year's FAD with the slide stating that RDNA3 would be manufactured in an advanced node, while zen4 was confirmed to be manufactured in the 5nm node was curious to say the least.
 
scineram said:
I am thinking if RDNA 3 was a 5 nm architecture AMD would have said so. That they didn't tells me that it is probably 6 nm.
Click to expand...

6nm doesn’t offer any performance or power savings. IIRC AMD has said that that RDNA3 would bring another 50% perf/watt increase. I don’t see that happening again on 7nm, although I suppose anything is possible. Note also that 6nm is really 7nm with EUV, and TSMC 3nm will likely be in mass production. This is important because Apple will be shifting to 3nm.
 
With RDNA2 they both tackled the problem with ever need for increased memory bandwidth (yes, it is not perfect) and took a step closer to the modular GPU. And while nvidia is not limited in process technology, as Intel is, I'm sure this will bring competition back in the GPU world. Also interesting with two ver different approaches to building a GPU.
 
gorobei said:
so native resolution could be dead as a metric as everyone will be forced to render 1080/1440 and upsample to 4k and use fsr/dlss to get the gains associated with "next gen" performance when it comes to framerates.
Click to expand...

Gross. Why not just render at 720p and upsample that for even bigger numbers at that point.

Even worse is that there's no longer any consistent image quality afterwards since both technologies will result in a different upsampled image. If that result is the accepted benchmark then both companies will be pushed to trade losses in quality for additional performance gain because bigger numbers!

Benchmarks should be kept to native resolution renders only.
 
uzzi38 said:
I'm expecting a split between 5nm and 6nm.

5nm for expensive MCM Navi31/32

6nm for the more cost effective monolithic Navi33 and beyond.
Click to expand...
I seriously doubt they would do that. Implementing the same RDNA 3 IP in two incompatible designs seems a lot of extra effort for questionable gain. Time, money, manpower. Especially since after Rembrandt and Raphael the low end GPU market might be completely decimated.
 
scineram said:
I seriously doubt they would do that. Implementing the same RDNA 3 IP in two incompatible designs seems a lot of extra effort for questionable gain. Time, money, manpower. Especially since after Rembrandt and Raphael the low end GPU market might be completely decimated.
Click to expand...

Perhaps a respin of RDNA 2 to 6 nm for low end?
 
It's possible that the I/O die is 6/7nm and that's why AMD saying "advanced node".

We now have kopite saying Rdna3 is a bigger increase over RDNA2 than RDNA2 was over RDNA1. Kitty saying RDNA3 is aiming over 2.5x performance and Redgamingtech also saying it's over 2.5x.

Based on the MacOs driver leak I think we are looking at 240 CU's for Navi31, basically 3x 80CU's chiplets. This just make more sense than 160CU's.

To hit above 2.5x performance with 160CU's you need 1.2x clocks and 1.3x ipc gain as you don't get perfect scaling when increasing Teraflops. This I think is possible but 240CU's is more likely.
 
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